Digital Circuits - Encoders

An Encoder is a combinational circuit that performs the reverse operation of Decoder. It has maximum of 2ⁿ input pnes and ‘n’ output pnes. It will produce a binary code equivalent to the input, which is active High. Therefore, the encoder encodes 2ⁿ input pnes with ‘n’ bits. It is optional to represent the enable signal in encoders.

4 to 2 Encoder

Let 4 to 2 Encoder has four inputs Y₃, Y₂, Y₁ & Y₀ and two outputs A₁ & A₀. The block diagram of 4 to 2 Encoder is shown in the following figure.

At any time, only one of these 4 inputs can be ‘1’ in order to get the respective binary code at the output. The Truth table of 4 to 2 encoder is shown below.

From Truth table, we can write the Boolean functions for each output as

$$A_{1}=Y_{3}+Y_{2}$$

$$A_{0}=Y_{3}+Y_{1}$$

We can implement the above two Boolean functions by using two input OR gates. The circuit diagram of 4 to 2 encoder is shown in the following figure.

The above circuit diagram contains two OR gates. These OR gates encode the four inputs with two bits

Octal to Binary Encoder

Octal to binary Encoder has eight inputs, Y₇ to Y₀ and three outputs A₂, A₁ & A₀. Octal to binary encoder is nothing but 8 to 3 encoder. The block diagram of octal to binary Encoder is shown in the following figure.

At any time, only one of these eight inputs can be ‘1’ in order to get the respective binary code. The Truth table of octal to binary encoder is shown below.

From Truth table, we can write the Boolean functions for each output as

$$A_{2}=Y_{7}+Y_{6}+Y_{5}+Y_{4}$$

$$A_{1}=Y_{7}+Y_{6}+Y_{3}+Y_{2}$$

$$A_{0}=Y_{7}+Y_{5}+Y_{3}+Y_{1}$$

We can implement the above Boolean functions by using four input OR gates. The circuit diagram of octal to binary encoder is shown in the following figure.

The above circuit diagram contains three 4-input OR gates. These OR gates encode the eight inputs with three bits.

Drawbacks of Encoder

Following are the drawbacks of normal encoder.

There is an ambiguity, when all outputs of encoder are equal to zero. Because, it could be the code corresponding to the inputs, when only least significant input is one or when all inputs are zero.

If more than one input is active High, then the encoder produces an output, which may not be the correct code. For example, if both Y₃ and Y₆ are ‘1’, then the encoder produces 111 at the output. This is neither equivalent code corresponding to Y₃, when it is ‘1’ nor the equivalent code corresponding to Y₆, when it is ‘1’.

So, to overcome these difficulties, we should assign priorities to each input of encoder. Then, the output of encoder will be the (binary) code corresponding to the active High input(s), which has higher priority. This encoder is called as priority encoder.

Priority Encoder

A 4 to 2 priority encoder has four inputs Y₃, Y₂, Y₁ & Y₀ and two outputs A₁ & A₀. Here, the input, Y₃ has the highest priority, whereas the input, Y₀ has the lowest priority. In this case, even if more than one input is ‘1’ at the same time, the output will be the (binary) code corresponding to the input, which is having higher priority.

We considered one more output, V in order to know, whether the code available at outputs is vapd or not.

If at least one input of the encoder is ‘1’, then the code available at outputs is a vapd one. In this case, the output, V will be equal to 1.

If all the inputs of encoder are ‘0’, then the code available at outputs is not a vapd one. In this case, the output, V will be equal to 0.

The Truth table of 4 to 2 priority encoder is shown below.

Use 4 variable K-maps for getting simppfied expressions for each output.

The simppfied Boolean functions are

$$A_{1}=Y_{3}+Y_{2}$$

$A_{0}=Y_{3}+{Y_{2}} Y_{1}$

Similarly, we will get the Boolean function of output, V as

$$V=Y_{3}+Y_{2}+Y_{1}+Y_{0}$$

We can implement the above Boolean functions using logic gates. The circuit diagram of 4 to 2 priority encoder is shown in the following figure.

The above circuit diagram contains two 2-input OR gates, one 4-input OR gate, one 2input AND gate & an inverter. Here AND gate & inverter combination are used for producing a vapd code at the outputs, even when multiple inputs are equal to ‘1’ at the same time. Hence, this circuit encodes the four inputs with two bits based on the priority assigned to each input.