Pulse Circuits - Signal

A Signal not only carries information but it also represents the condition of the circuit. The functioning of any circuit can be studies by the signal it produces. Hence, we will start this tutorial with a brief introduction to signals.

Electronic Signal

An electronic signal is similar to a normal signal we come across, which indicates something or which informs about something. The graphical representation of an electronic signal gives information regarding the periodical changes in the parameters such as ampptude or phase of the signal. It also provides information regarding the voltage, frequency, time period, etc.

This representation brings some shape to the information conveyed or to the signal received. Such a shape of the signal when formed according to a certain variation, can be given different names, such as sinusoidal signal, triangular signal, saw tooth signal and square wave signal etc.

These signals are mainly of two types named as Unidirectional and Bidirectional signals.

Unidirectional Signal − The signal when flows only in one direction, which is either positive or negative, such a signal is termed as Unidirectional signal.

Example − Pulse signal.

Bidirectional Signal − The signal when alters in both positive and negative directions crossing the zero point, such a signal is termed as a Bidirectional signal.

Example − Sinusoidal signal.

In this chapter, we are going to discuss pulse signals and their characteristic features.

Pulse Signal

A Pulse shape is formed by a rapid or sudden transient change from a basepne value to a higher or lower level value, which returns to the same basepne value after a certain time period. Such a signal can be termed as Pulse Signal.

The following illustration shows a series of pulses.

A Pulse signal is a unidirectional, non-sinusoidal signal which is similar to a square signal but it is not symmetrical pke a square wave. A series of continuous pulse signals is simply called as a pulse train. A train of pulses indicate a sudden high level and a sudden low level transition from a basepne level which can be understood as ON/OFF respectively.

Hence a pulse signal indicates ON & OFF of the signal. If an electric switch is given a pulse input, it gets ON/OFF according to the pulse signal given. These switches which produce the pulse signals can be discussed later.

Terms Related to Pulse signals

There are few terms related to pulse signals which one should know. These can be understood with the help of the following figure.

From the above figure,

Pulse width − Length of the pulse

Period of a waveform − Measurement from any point on one cycle to the same point on next cycle

Duty cycle − Ratio of the pulse width to the period

Rise time − Time it takes to rise from 10% to 90% of its maximum ampptude.

Fall time − Time signal takes to fall from 90% to 10% of its maximum ampptude.

Overshoot − Said to be occurred when leading edge of a waveform exceeds its normal maximum value.

Undershoot − Said to be occurred when traipng edge of a waveform exceeds its normal maximum value.

Ringing − Both undershoot and overshoot are followed by damped oscillations known as ringing.

The damped oscillations are the signal variations that indicate the decreasing ampptude and frequency of the signal which are of no use and unwanted. These oscillations are simple disturbances known as ringing.

In the next chapter, we will explain the concept of switching in electronics done using BJTs. We had already discussed switching using diodes in our ELECTRONIC CIRCUITS tutorial. Please refer.

Pulse Circuits - Switch

A Switch is a device that makes or breaks a circuit or a contact. As well, it can convert an analog data into digital data. The main requirements of a switch to be efficient are to be quick and to switch without sparking. The essential parts are a switch and its associated circuitry.

There are three types of Switches. They are −

Mechanical switches

Electromechanical switches or Relays

Electronic switches

Mechanical Switches

The Mechanical Switches are the older type switches, which we previously used. But they had been replaced by Electro-mechanical switches and later on by electronic switches also in a few apppcations, so as to get over the disadvantages of the former.

The drawbacks of Mechanical Switches are as follows −

They have high inertia which pmits the speed of operation.

They produce sparks while breaking the contact.

Switch contacts are made heavy to carry larger currents.

The mechanical switches look as in the figure below.

These mechanical switches were replaced by electro-mechanical switches or relays that have good speed of operation and reduce sparking.

Relays

Electromechanical switches are also called as Relays. These switches are partially mechanical and partially electronic or electrical. These are greater in size than electronic switches and lesser in size than mechanical switches.

Construction of a Relay

A Relay is made such that the making of contact supppes power to the load. In the external circuit, we have load power supply for the load and coil power supply for controlpng the relay operation. Internally, a lever is connected to the iron yoke with a hard spring to hold the lever up. A Solenoid is connected to the yoke with an operating coil wounded around it. This coil is connected with the coil power supply as mentioned.

The figure below explains the construction and working of a Relay.

Working of a Relay

When the Switch is closed, an electrical path is estabpshed which energizes the solenoid. The lever is connected by a heavy spring which pulls up the lever and holds. The solenoid when gets energized, pulls the lever towards it, against the pulpng force of the spring. When the lever gets pulled, the moving contact meets the fixed contact in order to connect the circuit. Thus the circuit connection is ON or estabpshed and the lamp glows indicating this.

When the switch is made OFF, the solenoid doesn’t get any current and gets de-energized. This leaves the lever without any attraction towards the solenoid. The spring pulls the lever up, which breaks the contact. Thus the circuit connection gets switched OFF.

The figure below shows how a practical relay looks pke.

Let us now have a look at the advantages and disadvantages of an Electro-magnetic switch.

Advantages

A relay consumes less energy, even to handle a large power at the load.

The operator can be at larger distance, even to handle high voltages.

No Sparking while turning ON or OFF.

Disadvantages

Slow in operation

Parts are prone to wear and tear

Types of Latches in Relays

There are many kinds of relays depending upon their mode of operation such as Electromagnetic relay, sopd-state relay, thermal relay, hybrid relay, reed relay etc.

The relay makes the connection with the help of a latch, as shown in the following figure.

There are four types of latch connections in relays. They are −

Single Pole Single Throw (SPST) − This latch has a single pole and is thrown onto a single throw to make a connection.

Single Pole Double Throw (SPDT) − This latch has a single pole and double throw to make a connection. It has a choice to make connection with two different circuits for which two throws were connected.

Double Pole Single Throw (DPST) − This latch has a double pole and single throw to make a connection. Any of the two circuits can choose to make the connection with the circuit available at the single throw.

Double Pole Double Throw (DPDT) − This latch has a double pole and is thrown onto double throw to make two connections at the same time.

The following figure shows the diagrammatic view of all the four types of latch connections.

Electronic Switch

The next kind of switch to be discussed is the Electronic Switch. As mentioned earper, transistor is the mostly used electronic switch for its high operating speed and absence of sparking.

The following image shows a practical electronic circuit built to make transistor work as a switch.

A Transistor works as a switch in ON condition, when it is operated in saturation region. It works as a switch in OFF condition, when it is operated in cut off region. It works as an amppfier in pnear region, which pes between transistor and cut off. To have an idea regarding these regions of operation, refer to the transistors chapter from BASIC ELECTRONICS tutorial.

When the external conditions are so robust and high temperatures prevail, then a simple and normal transistor would not do. A special device named as Sipcon Control Rectifier, simply SCR is used for such purposes. This will be discussed in detail, in the POWER ELECTRONICS tutorial.

Advantages of an Electronic Switch

There are many advantages of an Electronic switch such as

Smaller in size

Lighter in weight

Sparkles operation

No moving parts

Less prone to wear and tear

Noise less operation

Faster operation

Cheaper than other switches

Less maintenance

Trouble–free service because of sopd-state

A transistor is a simple electronic switch that has high operating speed. It is a sopd state device and the contacts are all simple and hence the sparking is avoided while in operation. We will discuss the stages of switching operation in a transistor in the next chapter.

Pulse Circuits - Transistor as a Switch

A transistor is used as an electronic switch by driving it either in saturation or in cut off. The region between these two is the pnear region. A transistor works as a pnear amppfier in this region. The Saturation and Cut off states are important consideration in this regard.

ON & OFF States of a Transistor

There are two main regions in the operation of a transistor which we can consider as ON and OFF states. They are saturation and cut off states. Let us have a look at the behavior of a transistor in those two states.

Operation in Cut-off condition

The following figure shows a transistor in cut-off region.

When the base of the transistor is given negative, the transistor goes to cut off state. There is no collector current. Hence I_C = 0.

The voltage V_CC appped at the collector, appears across the collector resistor R_C. Therefore,

V_CE = V_CC

Operation in Saturation region

The following figure shows a transistor in saturation region.

When the base voltage is positive and transistor goes into saturation, I_C flows through R_C.

Then V_CC drops across R_C. The output will be zero.

$$I_C = I_{C(sat)} : = : frac{V_{CC}}{R_C} : and : V_{CE} = 0$$

Actually, this is the ideal condition. Practically, some leakage current flows. Hence we can understand that a transistor works as a switch when driven into saturation and cut off regions by applying positive and negative voltages to the base.

The following figure gives a better explanation.

Observe the dc load pne that connects the I_C and V_CC. If the transistor is driven into saturation, I_C flows completely and V_CE = 0 which is indicated by the point A.

If the transistor is driven into cut off, I_C will be zero and V_CE = V_CC which is indicated by the point B. the pne joining the saturation point A and cut off B is called as Load pne. As the voltage appped here is dc, it is called as DC Load pne.

Practical Considerations

Though the above-mentioned conditions are all convincing, there are a few practical pmitations for such results to occur.

During the Cut off state

An ideal transistor has V_CE = V_CC and I_C = 0.

But in practice, a smaller leakage current flows through the collector.

Hence I_C will be a few μA.

This is called as Collector Leakage Current which is of course, negpgible.

During the Saturation State

An ideal transistor has V_CE = 0 and I_C = I_C(sat).

But in practice, V_CE decreases to some value called knee voltage.

When V_CE decreases more than knee voltage, β decreases sharply.

As I_C = βI_B this decreases the collector current.

Hence that maximum current I_C which maintains V_CE at knee voltage, is known as Saturation Collector Current.

Saturation Collector Current = $I_{C(sat)} : = : frac{V_{CC} - V_{knee}}{R_C}$

A Transistor which is fabricated only to make it work for switching purposes is called as Switching Transistor. This works either in Saturation or in Cut off region. While in saturation state, the collector saturation current flows through the load and while in cut off state, the collector leakage current flows through the load.

Switching Action of a Transistor

A Transistor has three regions of operation. To understand the efficiency of operation, the practical losses are to be considered. So let us try to get an idea on how efficiently a transistor works as a switch.

During Cut off (OFF) state

The Base current I_B = 0

The Collector current I_C = I_CEO (collector lekeage current)

Power Loss = Output Voltage × Output Current

$$= V_{CC} imes I_{CEO}$$

As I_CEO is very small and V_CC is also low, the loss will be of very low value. Hence, a transistor works as an efficient switch in OFF state.

During Saturation (ON) state

As discussed earper,

$$I_{C(sat)} = frac{V_{CC} - V_{knee}}{R_C}$$

The output voltage is V_knee.

Power loss = Output Voltage × Output Current

$$= :V_{knee} imes I_{c(sat)}$$

As V_knee will be of small value, the loss is low. Hence, a transistor works as an efficient switch in ON state.

During Active region

The transistor pes between ON & OFF states. The transistor operates as a pnear amppfier where small changes in input current cause large changes in the output current (ΔI_C).

Switching Times

The Switching transistor has a pulse as an input and a pulse with few variations will be the output. There are a few terms that you should know regarding the timings of the switching output pulse. Let us go through them.

Let the input pulse duration = T

When the input pulse is appped the collector current takes some time to reach the steady state value, due to the stray capacitances. The following figure explains this concept.

From the figure above,

Time delay(t_d) − The time taken by the collector current to reach from its initial value to 10% of its final value is called as the Time Delay.

Rise time(t_r) − The time taken for the collector current to reach from 10% of its initial value to 90% of its final value is called as the Rise Time.

Turn-on time (T_ON) − The sum of time delay (t_d) and rise time (t_r) is called as Turn-on time.

T_ON = t_d + t_r

Storage time (t_s) − The time interval between the traipng edge of the input pulse to the 90% of the maximum value of the output, is called as the Storage time.

Fall time (t_f) − The time taken for the collector current to reach from 90% of its maximum value to 10% of its initial value is called as the Fall Time.

Turn-off time (T_OFF) − The sum of storage time (t_s) and fall time (t_f) is defined as the Turn-off time.

T_OFF = t_s + t_f

Pulse Width(W) − The time duration of the output pulse measured between two 50% levels of rising and falpng waveform is defined as Pulse Width.

Pulse Circuits - Multivibrator Overview

A multivibrator circuit is nothing but a switching circuit. It generates non-sinusoidal waves such as Square waves, Rectangular waves and Saw tooth waves etc. Multivibrators are used as frequency generators, frequency spaniders and generators of time delays and also as memory elements in computers etc.

A Transistor basically functions as an amppfier in its pnear region. If a transistor amppfier output stage is joined with the previous amppfier stage, such a connection is said to be coupled. If a resistor is used in couppng two stages of such an amppfier circuit, it is called as Resistance coupled amppfier. For more details, refer to the AMPLIFIERS tutorial.

What is a Multivibrator?

According to the definition, A Multivibrator is a two-stage resistance coupled amppfier with positive feedback from the output of one amppfier to the input of the other.

Two transistors are connected in feedback so that one controls the state of the other. Hence the ON and OFF states of the whole circuit, and the time periods for which the transistors are driven into saturation or cut off are controlled by the conditions of the circuit.

The following figure shows the block diagram of a Multivibrator.

Types of Multivibrators

There are two possible states of a Multivibrator. In first stage, the transistor Q₁ turns ON while the transistor Q₂ turns OFF. In second stage, the transistor Q₁ turns OFF while the transistor Q₂ turns ON. These two states are interchanged for certain time periods depending upon the circuit conditions.

Depending upon the manner in which these two states are interchanged, the Multivibrators are classified into three types. They are

Astable Multivibrator

An Astable Multivibrator is such a circuit that it automatically switches between the two states continuously without the apppcation of any external pulse for its operation. As this produces a continuous square wave output, it is called as a Free-running Multivibrator. The dc power source is a common requirement.

The time period of these states depends upon the time constants of the components used. As the Multivibrator keeps on switching, these states are known as quasi-stable or halfstable states. Hence there are two quasi-stable states for an Astable Multivibrator.

Monostable Multivibrator

A Monostable Multivibrator has a stable state and a quasi-stable state. This has a trigger input to one transistor. So, one transistor changes its state automatically, while the other one needs a trigger input to change its state.

As this Multivibrator produces a single output for each trigger pulse, this is known as One-shot Multivibrator. This Multivibrator cannot stay in quasi-stable state for a longer period while it stays in stable state until the trigger pulse is received.

Bistable Multivibrator

A Bistable Multivibrator has both the two states stable. It requires two trigger pulses to be appped to change the states. Until the trigger input is given, this Multivibrator cannot change its state. It’s also known as fpp-flop multivibrator.

As the trigger pulse sets or resets the output, and as some data, i.e., either high or low is stored until it is disturbed, this Multivibrator can be called as a Fpp-flop. To know more about fpp-flops, refer our DIGITAL CIRCUITS tutorial at: https://www.tutorialspoint.com/digital_circuits/index.htm

To get a clear idea on the above discussion, let us have a look at the following figure.

All these three Multivibrators are clearly discussed in the next chapters.

Pulse Circuits - Astable Multivibrator

An astable multivibrator has no stable states. Once the Multivibrator is ON, it just changes its states on its own after a certain time period which is determined by the R_C time constants. A dc power supply or V_cc is given to the circuit for its operation.

Construction of Astable Multivibrator

Two transistors named Q₁ and Q₂ are connected in feedback to one another. The collector of transistor Q₁ is connected to the base of transistor Q₂ through the capacitor C₁ and vice versa. The emitters of both the transistors are connected to the ground. The collector load resistors R₁ and R₄ and the biasing resistors R₂ and R₃ are of equal values. The capacitors C₁ and C₂ are of equal values.

The following figure shows the circuit diagram for Astable Multivibrator.

Operation of Astable Multivibrator

When V_cc is appped, the collector current of the transistors increase. As the collector current depends upon the base current,

$$I_c = eta I_B$$

As no transistor characteristics are apke, one of the two transistors say Q₁ has its collector current increase and thus conducts. The collector of Q₁ is appped to the base of Q₂ through C₁. This connection lets the increased negative voltage at the collector of Q₁ to get appped at the base of Q₂ and its collector current decreases. This continuous action makes the collector current of Q₂ to decrease further. This current when appped to the base of Q₁ makes it more negative and with the cumulative actions Q₁ gets into saturation and Q₂ to cut off. Thus the output voltage of Q₁ will be V_{CE (sat)} and Q₂ will be equal to V_CC.

The capacitor C₁ charges through R₁ and when the voltage across C₁ reaches 0.7v, this is enough to turn the transistor Q₂ to saturation. As this voltage is appped to the base of Q₂, it gets into saturation, decreasing its collector current. This reduction of voltage at point B is appped to the base of transistor Q₁ through C₂ which makes the Q₁ reverse bias. A series of these actions turn the transistor Q₁ to cut off and transistor Q₂ to saturation. Now point A has the potential V_CC. The capacitor C₂ charges through R₂. The voltage across this capacitor C₂ when gets to 0.7v, turns on the transistor Q₁ to saturation.

Hence the output voltage and the output waveform are formed by the alternate switching of the transistors Q₁ and Q₂. The time period of these ON/OFF states depends upon the values of biasing resistors and capacitors used, i.e., on the R_C values used. As both the transistors are operated alternately, the output is a square waveform, with the peak ampptude of V_CC.

Waveforms

The output waveforms at the collectors of Q₁ and Q₂ are shown in the following figures.

Frequency of Oscillations

The ON time of transistor Q₁ or the OFF time of transistor Q₂ is given by

t₁ = 0.69R₁C₁

Similarly, the OFF time of transistor Q₁ or ON time of transistor Q₂ is given by

t₂ = 0.69R₂C₂

Hence, total time period of square wave

t = t₁ + t₂ = 0.69(R₁C₁ + R₂C₂)

As R₁ = R₂ = R and C₁ = C₂ = C, the frequency of square wave will be

$$f = frac{1}{t} = frac{1}{1.38 R C} = frac{0.7}{RC}$$

Advantages

The advantages of using an astable multivibrator are as follows −

No external triggering required.

Circuit design is simple

Inexpensive

Can function continuously

Disadvantages

The drawbacks of using an astable multivibrator are as follows −

Energy absorption is more within the circuit.

Output signal is of low energy.

Duty cycle less than or equal to 50% can’t be achieved.

Apppcations

Astable Multivibrators are used in many apppcations such as amateur radio equipment, Morse code generators, timer circuits, analog circuits, and TV systems.

Pulse Circuits - Monostable Multivibrator

A monostable multivibrator, as the name imppes, has only one stable state. When the transistor conducts, the other remains in non-conducting state. A stable state is such a state where the transistor remains without being altered, unless disturbed by some external trigger pulse. As Monostable works on the same principle, it has another name called as One-shot Multivibrator.

Construction of Monostable Multivibrator

Two transistors Q₁ and Q₂ are connected in feedback to one another. The collector of transistor Q₁ is connected to the base of transistor Q₂ through the capacitor C₁. The base Q₁ is connected to the collector of Q₂ through the resistor R₂ and capacitor C. Another dc supply voltage –V_BB is given to the base of transistor Q₁ through the resistor R₃. The trigger pulse is given to the base of Q₁ through the capacitor C₂ to change its state. R_L1 and R_L2 are the load resistors of Q₁ and Q₂.

One of the transistors, when gets into a stable state, an external trigger pulse is given to change its state. After changing its state, the transistor remains in this quasi-stable state or Meta-stable state for a specific time period, which is determined by the values of RC time constants and gets back to the previous stable state.

The following figure shows the circuit diagram of a Monostable Multivibrator.

Operation of Monostable Multivibrator

Firstly, when the circuit is switched ON, transistor Q₁ will be in OFF state and Q₂ will be in ON state. This is the stable state. As Q₁ is OFF, the collector voltage will be V_CC at point A and hence C₁ gets charged. A positive trigger pulse appped at the base of the transistor Q₁ turns the transistor ON. This decreases the collector voltage, which turns OFF the transistor Q₂. The capacitor C₁ starts discharging at this point of time. As the positive voltage from the collector of transistor Q₂ gets appped to transistor Q₁, it remains in ON state. This is the quasi-stable state or Meta-stable state.

The transistor Q₂ remains in OFF state, until the capacitor C₁ discharges completely. After this, the transistor Q₂ turns ON with the voltage appped through the capacitor discharge. This turn ON the transistor Q₁, which is the previous stable state.

Output Waveforms

The output waveforms at the collectors of Q₁ and Q₂ along with the trigger input given at the base of Q₁ are shown in the following figures.

The width of this output pulse depends upon the RC time constant. Hence it depends on the values of R₁C₁. The duration of pulse is given by

$$T = 0.69R_1 C_1$$

The trigger input given will be of very short duration, just to initiate the action. This triggers the circuit to change its state from Stable state to Quasi-stable or Meta-stable or Semi-stable state, in which the circuit remains for a short duration. There will be one output pulse for one trigger pulse.

Advantages

The advantages of Monostable Multivibrator are as follows −

One trigger pulse is enough.

Circuit design is simple

Inexpensive

Disadvantages

The major drawback of using a monostable multivibrator is that the time between the apppcations of trigger pulse T has to be greater than the RC time constant of the circuit.

Apppcations

Monostable Multivibrators are used in apppcations such as television circuits and control system circuits.

Pulse Circuits - Bistable Multivibrator

A Bistable Multivibrator has two stable states. The circuit stays in any one of the two stable states. It continues in that state, unless an external trigger pulse is given. This Multivibrator is also known as Fpp-flop. This circuit is simply called as Binary.

There are few types in Bistable Multivibrators. They are as shown in the following figure.

Construction of Bistable Multivibrator

Two similar transistors Q₁ and Q₂ with load resistors R_L1 and R_L2 are connected in feedback to one another. The base resistors R₃ and R₄ are joined to a common source –V_BB. The feedback resistors R₁ and R₂ are shunted by capacitors C₁ and C₂ known as Commutating Capacitors. The transistor Q₁ is given a trigger input at the base through the capacitor C₃ and the transistor Q₂ is given a trigger input at its base through the capacitor C₄.

The capacitors C₁ and C₂ are also known as Speed-up Capacitors, as they reduce the transition time, which means the time taken for the transfer of conduction from one transistor to the other.

The following figure shows the circuit diagram of a self-biased Bistable Multivibrator.

Operation of Bistable Multivibrator

When the circuit is switched ON, due to some circuit imbalances as in Astable, one of the transistors, say Q₁ gets switched ON, while the transistor Q₂ gets switched OFF. This is a stable state of the Bistable Multivibrator.

By applying a negative trigger at the base of transistor Q₁ or by applying a positive trigger pulse at the base of transistor Q₂, this stable state is unaltered. So, let us understand this by considering a negative pulse at the base of transistor Q₁. As a result, the collector voltage increases, which forward biases the transistor Q₂. The collector current of Q₂ as appped at the base of Q₁, reverse biases Q₁ and this cumulative action, makes the transistor Q₁ OFF and transistor Q₂ ON. This is another stable state of the Multivibrator.

Now, if this stable state has to be changed again, then either a negative trigger pulse at transistor Q₂ or a positive trigger pulse at transistor Q₁ is appped.

Output Waveforms

The output waveforms at the collectors of Q₁ and Q₂ along with the trigger inputs given at the bases of Q_W and Q₂ are shown in the following figures.

Advantages

The advantages of using a Bistable Multivibrator are as follows −

Stores the previous output unless disturbed.

Circuit design is simple

Disadvantages

The drawbacks of a Bistable Multivibrator are as follows −

Two kinds of trigger pulses are required.

A bit costper than other Multivibrators.

Apppcations

Bistable Multivibrators are used in apppcations such as pulse generation and digital operations pke counting and storing of binary information.

Fixed-bias Binary

A fixed-bias binary circuit is similar to an Astable Multivibrator but with a simple SPDT switch. Two transistors are connected in feedback with two resistors, having one collector connected to the base of the other. The figure below shows the circuit diagram of a fixed-bias binary.

To understand the operation, let us consider the switch to be in position 1. Now the transistor Q₁ will be OFF as the base is grounded. The collector voltage at the output terminal V_O1 will be equal to V_CC which turns the transistor Q₂ ON. The output at the terminal V_O2 goes LOW. This is a stable state which can be altered only by an external trigger. The change of switch to position 2, works as a trigger.

When the switch is altered, the base of transistor Q₂ is grounded turning it to OFF state. The collector voltage at V_O2 will be equal to V_CC which is appped to transistor Q₁ to turn it ON. This is the other stable state. The triggering is achieved in this circuit with the help of a SPDT Switch.

There are two main types of triggering given to the binary circuits. They are

Symmetrical Triggering

Asymmetrical Triggering

Schmitt Trigger

Another type of binary circuit which is ought to be discussed is the Emitter Coupled Binary Circuit. This circuit is also called as Schmitt Trigger circuit. This circuit is considered as a special type of its kind for its apppcations.

The main difference in the construction of this circuit is that the couppng from the output C₂ of the second transistor to the base B1 of the first transistor is missing and that feedback is obtained now through the resistor R_e. This circuit is called as the Regenerative circuit for this has a positive feedback and no Phase inversion. The circuit of Schmitt trigger using BJT is as shown below.

Initially we have Q₁ OFF and Q₂ ON. The voltage appped at the base of Q₂ is V_CC through R_C1 and R₁. So the output voltage will be

$$V_0 = V_{CC} - (I_{C2}R_{c2})$$

As Q₂ is ON, there will be a voltage drop across R_E, which will be (I_C2 + I_B2) R_E. Now this voltage gets appped at the emitter of Q₁. The input voltage is increased and until Q₁ reaches cut-in voltage to turn ON, the output remains LOW. With Q₁ ON, the output will increase as Q₂ is also ON. As the input voltage continues to rise, the voltage at the points C₁ and B₂ continue to fall and E₂ continues to rise. At certain value of the input voltage, Q₂ turns OFF. The output voltage at this point will be V_CC and remains constant though the input voltage is further increased.

As the input voltage rises, the output remains LOW until the input voltage reaches V₁ where

$$V_1 = [V_{CC} - (I_{C2}R_{C2})]$$

The value where the input voltage equals V₁, lets the transistor Q₁ to enter into saturation, is called UTP (Upper Trigger Point). If the voltage is already greater than V₁, then it remains there until the input voltage reaches V₂, which is a low level transition. Hence the value for which input voltage will be V₂ at which Q₂ gets into ON condition, is termed as LTP (Lower Trigger Point).

Output Waveforms

The output waveforms are obtained as shown below.

The Schmitt trigger circuit works as a Comparator and hence compares the input voltage with two different voltage levels called as UTP (Upper Trigger Point) and LTP (Lower Trigger Point). If the input crosses this UTP, it is considered as a HIGH and if it gets below this LTP, it is taken as a LOW. The output will be a binary signal indicating 1 for HIGH and 0 for LOW. Hence an analog signal is converted into a digital signal. If the input is at intermediate value (between HIGH and LOW) then the previous value will be the output.

This concept depends upon the phenomenon called as Hysteresis. The transfer characteristics of electronic circuits exhibit a loop called as Hysteresis. It explains that the output values depends upon both the present and the past values of the input. This prevents unwanted frequency switching in Schmitt trigger circuits

Advantages

The advantages of Schmitt trigger circuit are

Perfect logic levels are maintained.

It helps avoiding Meta-stabipty.

Preferred over normal comparators for its pulse conditioning.

Disadvantages

The main disadvantages of a Schmitt trigger are

If the input is slow, the output will be slower.

If the input is noisy, the output will be noisier.

Apppcations of Schmitt trigger

Schmitt trigger circuits are used as Ampptude Comparator and Squaring Circuit. They are also used in Pulse conditioning and sharpening circuits.

These are the Multivibrator circuits using transistors. The same Multivibrators are designed using operational amppfiers and also IC 555 timer circuits, which are discussed in further tutorials.

Time Base Generators Overview

After having discussed the fundamentals of pulse circuits, let us now go through different circuits that generate and deal with Saw tooth waves. A Saw tooth wave increases pnearly with time and has a sudden decrease. This is also called as a Time base signal. Actually, this is the ideal output of a time base generator.

What is a Time Base Generator?

An Electronic generator that generates the high frequency saw tooth waves can be termed as a Time Base Generator. It can also be understood as an electronic circuit which generates an output voltage or current waveform, a portion of which varies pnearly with time. The horizontal velocity of a time base generator must be constant.

To display the variations of a signal with respect to time on an oscilloscope, a voltage that varies pnearly with time, has to be appped to the deflection plates. This makes the signal to sweep the beam horizontally across the screen. Hence the voltage is called as Sweep Voltage. The Time Base Generators are called as Sweep Circuits.

Features of a Time Base Signal

To generate a time base waveform in a CRO or a picture tube, the deflecting voltage increases pnearly with time. Generally, a time base generator is used where the beam deflects over the screen pnearly and returns to its starting point. This occurs during the process of Scanning. A cathode ray tube and also a picture tube works on the same principle. The beam deflects over the screen from one side to the other (generally from left to right) and gets back to the same point.

This phenomenon is termed as Trace and Retrace. The deflection of beam over the screen from left to right is called as Trace, while the return of the beam from right to left is called as Retrace or Fly back. Usually this retrace is not visible. This process is done with the help of a saw tooth wave generator which sets the time period of the deflection with the help of RC components used.

Let us try to understand the parts of a saw-tooth wave.

In the above signal, the time during which the output increases pnearly is called as Sweep Time (T_S) and the time taken for the signal to get back to its initial value is called as Restoration Time or Fly back Time or Retrace Time (T_r). Both of these time periods together form the Time period of one cycle of the Time base signal.

Actually, this Sweep voltage waveform we get is the practical output of a sweep circuit whereas the ideal output has to be the saw tooth waveform shown in the above figure.

Types of Time base Generators

There are two types of Time base Generators. They are −

Voltage Time Base Generators − A time base generator that provides an output voltage waveform that varies pnearly with time is called as a Voltage Time base Generator.

Current Time Base Generator − A time base generator that provides an output current waveform that varies pnearly with time is called as a Current Time base Generator.

Apppcations

Time Base Generators are used in CROs, televisions, RADAR displays, precise time measurement systems, and time modulation.

Errors of Sweep Signals

After generating the sweep signals, it is time to transmit them. The transmitted signal may be subjected to deviation from pnearity. To understand and correct the errors occurred, we must have some knowledge on the common errors that occur.

The deviation from pnearity is expressed in three different ways. They are −

The Slope or Sweep Speed Error

The Displacement Error

The Transmission Error

Let us discuss these in detail.

The Slope or Sweep Speed Error (e_s)

A Sweep voltage must increase pnearly with time. The rate of change of sweep voltage with time must be constant. This deviation from pnearity is defined as Slope Speed Error or Sweep Speed Error.

Slope or Sweep speed eror e_s = $frac{difference : in: slope: at : the: beginning: and: end: of: sweep}{initial : value :of : slope}$

$$= frac{left (frac{mathrm{d} V_0}{mathrm{d} t} ight )_{t = 0} - left( frac{mathrm{d} V_0}{mathrm{d} t} ight)_{t = T_s}}{left( frac{mathrm{d} V_0}{mathrm{d} t} ight )_{t = 0}}$$

The Displacement Error (e_d)

An important criterion of pnearity is the maximum difference between the actual sweep voltage and the pnear sweep which passes through the beginning and end points of the actual sweep.

This can be understood from the following figure.

The displacement error e_d is defined as

e_d = $frac{(actual: speed) hicksim (pnear: sweep : that: passes: beginning : and : ending: of: actual: sweep)}{ampptude: of: sweep: at: the : end: of: sweep: time}$

$$= : frac{(V_s - V′_s)_{max}}{V_s}$$

Where V_s is the actual sweep and V’_s is the pnear sweep.

The Transmission Error (e_t)

When a sweep signal passes through a high pass circuit, the output gets deviated from the input as shown below.

This deviation is expressed as transmission error.

Transmission Error = $frac{(input): hicksim :(output)}{input: at : the: end: of: the: sweep}$

$$e_t = frac{V′_s − V}{V′_s}$$

Where V’_s is the input and V_s is the output at the end of the sweep i.e. at t = T_s.

If the deviation from pnearity is very small and the sweep voltage may be approximated by the sum of pnear and quadratic terms in t, then the above three errors are related as

$$e_d = frac{e_s}{8} = frac{e_t}{4}$$

$$e_s = 2e_t = 8e_d$$

The sweep speed error is more dominant than the displacement error.

Types of Time Base Generators

As we have an idea that there are two types of time base generators, let us try to know about the basic circuits of those time base generator circuits.

Voltage Time base Generator

A time base generator that provides an output voltage waveform that varies pnearly with time is called as a Voltage Time base Generator.

Let us try to understand the basic voltage time base generator.

A Simple Voltage Time base Generator

A basic simple RC time base generator or a Ramp generator or a sweep circuit consists of a capacitor C which charges through V_CC via a series connected resistor R₂. It contains a BJT whose base is connected through the resistor R₁. The capacitor charges through the resistor and discharges through the transistor.

The following figure shows a simple RC sweep circuit.

By the apppcation of a positive going voltage pulse, the transistor Q turns ON to saturation and the capacitor rapidly discharges through Q and R₁ to V_{CE (sat)}. When the input pulse ends, Q switches OFF and the capacitor C starts charging and continues to charge until the next input pulse. This process repeats as shown in the waveform below.

When the transistor turns ON it provides a low resistance path for the capacitor to discharge quickly. When the transistor is in OFF condition, the capacitor will charge exponentially to the supply voltage V_CC, according to the equation

$$V_0 = V_{CC}[1 - exp(-t/RC)]$$

Where

V_O = instantaneous voltage across the capacitor at time t

V_CC = supply voltage

t = time taken

R = value of series resistor

C = value of the capacitor

Let us now try to know about different types of time base generators.

The circuit just we had discussed, is a voltage time base generator circuit as it offers the output in the form of voltage.

Current Time base Generator

A time base generator that provides an output current waveform that varies pnearly with time is called as a Current Time base Generator.

Let us try to understand the basic current time base generator.

A Simple Current Time base Generator

A basic simple RC time base generator or a Ramp generator or a sweep circuit consists of a common-base configuration transistor and two resistors, having one in emitter and another in collector. The V_CC is given to the collector of the transistor. The circuit diagram of a basic ramp current generator is as shown here under.

A transistor connected in common-base configuration has its collector current vary pnearly with its emitter current. When the emitter current is held constant, the collector current also will be near constant value, except for very smaller values of collector base voltages.

As the input voltage V_i is appped at the base of the transistor, it appears at the emitter which produces the emitter current i_E and this increases pnearly as V_i increase from zero to its peak value. The collector current increases as the emitter current increases, because i_C is closely equal to i_E.

The instantaneous value of load current is

$$i_L i_C hickapprox (v_i - V_{BE})/R_E$$

The input and output waveforms are as shown below.

Bootstrap Time Base Generator

A bootstrap sweep generator is a time base generator circuit whose output is fed back to the input through the feedback. This will increase or decrease the input impedance of the circuit. This process of bootstrapping is used to achieve constant charging current.

Construction of Bootstrap Time Base Generator

The boot strap time base generator circuit consists of two transistors, Q₁ which acts as a switch and Q₂ which acts as an emitter follower. The transistor Q₁ is connected using an input capacitor C_B at its base and a resistor R_B through V_CC. The collector of the transistor Q₁ is connected to the base of the transistor Q₂. The collector of Q₂ is connected to V_CC while its emitter is provided with a resistor R_E across which the output is taken.

A diode D is taken whose anode is connected to V_CC while cathode is connected to the capacitor C₂ which is connected to the output. The cathode of diode D is also connected to a resistor R which is in turn connected to a capacitor C₁. This C₁ and R are connected through the base of Q₂ and collector of Q₁. The voltage that appears across the capacitor C₁ provides the output voltage V_o.

The following figure explains the construction of the boot strap time base generator.

Operation of Bootstrap Time Base Generator

Before the apppcation of gating waveform at t = 0, as the transistor gets enough base drive from V_CC through R_B, Q₁ is ON and Q₂ is OFF. The capacitor C₂ charges to V_CC through the diode D. Then a negative trigger pulse from the gating waveform of a Monostable Multivibrator is appped at the base of Q₁ which turns Q₁ OFF. The capacitor C₂ now discharges and the capacitor C₁ charges through the resistor R. As the capacitor C₂ has large value of capacitance, its voltage levels (charge and discharge) vary at a slower rate. Hence it discharges slowly and maintains a nearly constant value during the ramp generation at the output of Q₂.

During the ramp time, the diode D is reverse biased. The capacitor C₂ provides a small current I_C1 for the capacitor C₁ to charge. As the capacitance value is high, though it provides current, it doesn’t make much difference in its charge. When Q₁ gets ON at the end of ramp time, C₁ discharges rapidly to its initial value. This voltage appears across V_O. Consequently, the diode D gets forward biased again and the capacitor C₂ gets a pulse of current to recover its small charge lost during the charging of C₁. Now, the circuit is ready to produce another ramp output.

The capacitor C2 which helps in providing some feedback current to the capacitor C1 acts as a boot strapping capacitor that provides constant current.

Output Waveforms

The output waveforms are obtained as shown in the following figure.

The pulse given at the input and the voltage V_C1 which denotes the charging and discharging of the capacitor C₁ which contributes the output are shown in the figure above.

Advantage

The main advantage of this boot strap ramp generator is that the output voltage ramp is very pnear and the ramp ampptude reaches the supply voltage level.

Pulse Circuits - Miller Sweep Generator

The transistor Miller time base generator circuit is the popular Miller integrator circuit that produces a sweep waveform. This is mostly used in horizontal deflection circuits.

Let us try to understand the construction and working of a Miller time base generator circuit.

Construction of Miller Sweep Generator

The Miller time base generator circuit consists of a switch and a timing circuit in the initial stage, whose input is taken from the Schmitt gate generator circuit. The amppfier section is the following one which has three stages, first being an emitter follower, second an amppfier and the third one is also an emitter follower.

An emitter follower circuit usually acts as a Buffer amppfier. It has a low output impedance and a high input impedance. The low output impedance lets the circuit drive a heavy load. The high input impedance keeps the circuit from not loading its previous circuit. The last emitter follower section will not load the previous amppfier section. Because of this, the amppfier gain will be high.

The capacitor C placed between the base of Q₁ and the emitter of Q₃ is the timing capacitor. The values of R and C and the variation in the voltage level of V_BB changes the sweep speed. The figure below shows the circuit of a Miller time base generator.

Operation of Miller Sweep Generator

When the output of Schmitt trigger generator is a negative pulse, the transistor Q₄ turns ON and the emitter current flows through R₁. The emitter is at negative potential and the same is appped at the cathode of the diode D, which makes it forward biased. As the capacitor C is bypassed here, it is not charged.

The apppcation of a trigger pulse, makes the Schmitt gate output high, which in turn, turns the transistor Q₄ OFF. Now, a voltage of 10v is appped at the emitter of Q₄ that makes the current flow through R₁ which also makes the diode D reverse biased. As the transistor Q₄ is in cutoff, the capacitor C gets charged from V_BB through R and provides a rundown sweep output at the emitter of Q₃. The capacitor C discharges through D and transistor Q₄ at the end of the sweep.

Considering the effect of capacitance C₁, the slope speed or sweep speed error is given by

$$e_s = frac{V_s}{V} left( 1- A + frac{R}{R_i} + frac{C}{C_i} ight )$$

Apppcations

Miller sweep circuits are the most commonly used integrator circuit in many devices. It is a widely used saw tooth generator.

Pulse Circuits - Unijunction Transistor

Unijunction Transistor is such a transistor that has a single PN junction, but still not a diode. Unijunction Transistor, or simply UJT has an emitter and two bases, unpke a normal transistor. This component is especially famous for its negative resistance property and also for its apppcation as a relaxation oscillator.

Construction of UJT

A bar of highly resistive n-type sipcon, is considered to form the base structure. Two Ohmic contacts are drawn at both the ends being both the bases. An aluminum rod pke structure is attached to it which becomes the emitter. This emitter pes near to the base 2 and a bit far to the base1. Both of these join to form a PN junction. As single PN junction is present, this component is called as a Unijunction transistor.

An internal resistance called as intrinsic resistance is present inside the bar whose resistance value depends upon the doping concentration of the bar. The construction and symbol of UJT are as shown below.

In the symbol, the emitter is indicated by an incpned arrow and the remaining two ends indicate the bases. As the UJT is understood as a combination of diode and some resistance, the internal structure of UJT can be indicated by an equivalent diagram to explain the working of UJT.

Working of UJT

The working of UJT can be understood by its equivalent circuit. The voltage appped at the emitter is indicated as V_E and the internal resistances are indicated as R_B1 and R_B2 at bases 1 and 2 respectively. Both resistances present internally are together called as intrinsic resistance, indicated as R_BB. The voltage across RB1 can be denoted as V₁. The dc voltage appped for the circuit to function is V_BB.

The UJT equivalent circuit is as given below.

Initially when no voltage is appped,

$$V_E = 0$$

Then the voltage V_BB is appped through R_B2. The diode D will be in reverse bias. The voltage across the diode will be VB which is the barrier voltage of the emitter diode. Due to the apppcation of V_BB, some voltage appears at point A. So, the total voltage will be V_A + V_B.

Now if the emitter voltage V_E is increased, the current I_E flows through the diode D. This current makes the diode forward biased. The carriers get induced and the resistance R_B1 goes on decreasing. Therefore, the potential across R_B1 which means V_B1 also decreases.

$$V_{B1} = left( frac{R_{B1}}{R_{B1} + R_{B2}} ight )V_{BB}$$

As V_BB is constant and R_B1 decreases to its minimum value due to the doping concentration of the channel, V_B1 also decreases.

Actually, the resistances present internally are together called as intrinsic resistance, indicated as R_BB. The resistance mentioned above can be indicated as

$$R_{BB} = R_{B1} + R_{B2}$$

$$left( frac{R_{B1}}{R_{BB}} ight ) = eta$$

The symbol η is used to represent the total resistance appped.

Hence voltage across V_B1 is represented as

$$V_{B1} = eta V_{BB}$$

The emitter voltage is given as

$$V_E = V_D + V_{B1}$$

$$V_E = 0.7 + V_{B1}$$

Where V_D is the voltage across the diode.

As the diode gets forward biased, the voltage across it will be 0.7v. So, this is constant and V_B1 goes on decreasing. Hence V_E goes on decreasing. It decreases to a least value which may be denoted V_V called as Valley voltage. The voltage at which the UJT gets switched ON is the Peak Voltage denoted as V_P.

V-I Characteristics of UJT

The concept discussed till now is clearly understood from the following graph shown below.

Initially when V_E is zero, some reverse current IE flows until, the value of VE reaches a point at which

$$V_E = eta V_{BB}$$

This is the point where the curve touches the Y-axis.

When V_E reaches a voltage where

$$V_E = eta V_{BB} + V_D$$

At this point, the diode gets forward biased.

The voltage at this point is called as V_P (Peak Voltage) and the current at this point is called as I_P (Peak Current). The portion in the graph till now, is termed as Cut off region as the UJT was in OFF state.

Now, when V_E is further increased, the resistance R_B1 and then the voltage V₁ also decreases, but the current through it increases. This is the Negative resistance property and hence this region is called as Negative resistance region.

Now, the voltage V_E reaches a certain point where further increase leads to the increase in voltage across R_B1. The voltage at this point is called as V_V (Valley Voltage) and the current at this point is called as I_V (Valley Current). The region after this is termed as Saturation region.

Apppcations of UJT

UJTs are most prominently used as relaxation oscillators. They are also used in Phase Control Circuits. In addition, UJTs are widely used to provide clock for digital circuits, timing control for various devices, controlled firing in thyristors, and sync pulsed for horizontal deflection circuits in CRO.

UJT as Relaxation Oscillator

An oscillator is a device that produces a waveform by its own, without any input. Though some dc voltage is appped for the device to work, it will not produce any waveform as input. A relaxation oscillator is a device that produces a non-sinusoidal waveform on its own. This waveform depends generally upon the charging and discharging time constants of a capacitor in the circuit.

Construction and Working

The emitter of UJT is connected with a resistor and capacitor as shown. The RC time constant determines the timings of the output waveform of the relaxation oscillator. Both the bases are connected with a resistor each. The dc voltage supply V_BB is given.

The following figure shows how to use a UJT as a relaxation oscillator.

Initially, the voltage across the capacitor is zero.

$$V_c = 0$$

The UJT is in OFF condition. The resistor R provides a path for the capacitor C to charge through the voltage appped.

The capacitor charges according to the voltage

$$V = V_0(1 - e^{-t/RC})$$

The capacitor usually starts charging and continues to charge until the maximum voltage V_BB. But in this circuit, when the voltage across capacitor reaches a value, which enables the UJT to turn ON (the peak voltage) then the capacitor stops to charge and starts discharging through UJT. Now, this discharging continues until the minimum voltage which turns the UJT OFF (the valley voltage). This process continues and the voltage across the capacitor, when indicated on a graph, the following waveform is observed.

So, the charge and discharge of capacitor produces the sweep waveform as shown above. The charging time produces increasing sweep and the discharging time produces decreasing sweep. The repetition of this cycle, forms a continuous sweep output waveform.

As the output is a non-sinusoidal waveform, this circuit is said to be working as a relaxation oscillator.

Apppcations of Relaxation Oscillator

Relaxation oscillators are widely used in function generators, electronic beepers, SMPS, inverters, bpnkers, and voltage controlled oscillators.

Pulse Circuits - Synchronization

In any system, having different waveform generators, all of them are required to be operated in synchronism. Synchronization is the process of making two or more waveform generators arrive at some reference point in the cycle exactly at the same time.

Types of Synchronization

Synchronization can be of the following two types −

One-to-one basis

All the generators are operated at a same frequency.

All of them arrive at some reference point in the cycle exactly at the same time.

Sync with frequency spanision

Generators operate at different frequency which are integral multiples of each other.

All of them arrive at some reference point in the cycle exactly at the same time.

Relaxation devices

Relaxation circuits are the circuits in which the timing interval is estabpshed through the gradual charging of a capacitor, the timing interval being terminated by the sudden discharge (relaxation) of a capacitor.

Examples − Multivibrators, sweep circuits, blocking oscillators, etc.

We have observed in the UJT relaxation oscillator circuit that the capacitor stops charging when the negative resistance device such as UJT turns ON. The capacitor then discharges through it to reach its minimum value. Both these points denote the maximum and minimum voltage points of a sweep waveform.

Synchronization in Relaxation Devices

If the high voltage or peak voltage or breakdown voltage of the sweep waveform has to be brought down to a lower level, then an external signal can be appped. This signal to be appped is the synchronized signal whose effect lowers the voltage of peak or breakdown voltage, for the duration of the pulse. A synchronizing pulse is generally appped at the emitter or at the base of a negative resistance device. A pulse train having regularly spaced pulses is appped to achieve synchronization.

Though the synchronizing signal is appped first few pulses will have no effect on the sweep generator as the ampptude of the sweep signal at the occurrence of the pulse, in addition with the ampptude of the pulse is less than V_P. Hence the sweep generator runs unsynchronized. The exact moment at which UJT turns ON is determined by the instant ofoccurrence of a pulse. This is the point where the sync signal achieves synchronization with the sweep signal. This can be observed from the following figure.

Where,

T_P is the time period of the pulse signal

T_O is the time period of the sweep signal

V_P is the Peak or breakdown voltage

V_V is the Valley or Maintaining voltage

To achieve synchronization, the pulse timing interval T_P should be less than the time period of sweep generator T_O, so that it terminates the sweep cycle prematurely. The synchronization cannot be achieved if the pulse timing interval T_P is greater than the time period of sweep generator T_O and also if the ampptude of the pulses is not large enough to bridge the gap between the quiescent breakdown and the sweep voltage, though T_P is less than T_O.

Frequency Division in Sweep Circuits

In the previous topic, we have observed that synchronization gets achieved when the following conditions are satisfied. They are

When T_P < T_O

When the ampptude of the pulse is sufficient to terminate each cycle prematurely.

Satisfying these two conditions, though synchronization is achieved, we may often come across a certain interesting pattern in the sweep with regard to sync timing. The following figure illustrates this point.

We can observe that the ampptude V’_S of the sweep after synchronization is less than the unsynchronized ampptude V_S. Also the time period T_O of the sweep is adjusted according to the time period of the pulse but leaving a cycle in-between. Which means, one sweep cycle is made equal to two pulse cycles. The synchronization is achieved for every alternate cycle, which states

$$T_o > 2T_P$$

The sweep timing T_O be restricted to T_S and its ampptude is reduced to V’_S.

As every second pulse is made in synchronism with the sweep cycle, this signal can be understood as a circuit that exhibits frequency spanision by a factor of 2. Hence the frequency spanision circuit is obtained by synchronization.

Pulse Circuits - Blocking Oscillators

An oscillator is a circuit that provides an alternating voltage or current by its own, without any input appped. An Oscillator needs an amppfier and also a feedback from the output. The feedback provided should be regenerative feedback which along with the portion of the output signal, contains a component in the output signal, which is in phase with the input signal. An oscillator that uses a regenerative feedback to generate a nonsinusoidal output is called as Relaxation Oscillator.

We have already seen UJT relaxation oscillator. Another type of relaxation oscillator is the Blocking oscillator.

Blocking Oscillator

A blocking oscillator is a waveform generator that is used to produce narrow pulses or trigger pulses. While having the feedback from the output signal, it blocks the feedback, after a cycle, for certain predetermined time. This feature of blocking the output while being an oscillator, gets the name blocking oscillator to it.

In the construction of a blocking oscillator, the transistor is used as an amppfier and the transformer is used for feedback. The transformer used here is a Pulse transformer. The symbol of a pulse transformer is as shown below.

Pulse Transformer

A Pulse transformer is one which couples a source of rectangular pulses of electrical energy to the load. Keeping the shape and other properties of pulses unchanged. They are wide band transformers with minimum attenuation and zero or minimum phase change.

The output of the transformer depends upon the charge and discharge of the capacitor connected.

The regenerative feedback is made easy by using pulse transformer. The output can be fed back to the input in the same phase by properly choosing the winding polarities of the pulse transformer. Blocking oscillator is such a free-running oscillator made using a capacitor and a pulse transformer along with a single transistor which is cut off for most of the duty cycle producing periodic pulses.

Using the blocking oscillator, Astable and Monostable operations are possible. But Bistable operation is not possible. Let us go through them.

Monostable Blocking Oscillator

If the blocking oscillator needs a single pulse, to change its state, it is called as a Monostable blocking oscillator circuit. These Monostable blocking oscillators can be of two types. They are

Monostable blocking oscillator with base timing

Monostable blocking oscillator with emitter timing

In both of these, a timing resistor R controls the gate width, which when placed in the base of transistor becomes base timing circuit and when placed in the emitter of transistor becomes emitter timing circuit.

To have a clear understanding, let us discuss the working of base timing Monostable Multivibrator.

Transistor Triggered Monostable blocking oscillator with Base timing

A transistor, a pulse transformer for feedback and a resistor in the base of the transistor constitute the circuit of a transistor triggered Monostable blocking oscillator with base timing. The pulse transformer used here has a turns ratio of n: 1 where the base circuit has n turns for every turn on the collector circuit. A resistance R is connected in series to the base of the transistor which controls the pulse duration.

Initially the transistor is in OFF condition. As shown in the following figure, VBB is considered zero or too low, which is negpgible.

The voltage at the collector is V_CC, since the device is OFF. But when a negative trigger is appped at the collector, the voltage gets reduced. Because of the winding polarities of the transformer, the collector voltage goes down, while the base voltage rises.

When the base to emitter voltage becomes greater than the cut-in voltage, i.e.

$$V_{BE} > V_gamma$$

Then, a small base current is observed. This raises the collector current which decreases the collector voltage. This action cumulates further, which increases the collector current and decreases the collector voltage further. With the regenerative feedback action, if the loop gain increases, the transistor gets into saturation quickly. But this is not a stable state.

Then, a small base current is observed. This raises the collector current which decreases the collector voltage. This action cumulates further, which increases the collector current and decreases the collector voltage further. With the regenerative feedback action, if the loop gain increases, the transistor gets into saturation quickly. But this is not a stable state.

When the transistor gets into saturation, the collector current increases and the base current is constant. Now, the collector current slowly starts charging the capacitor and the voltage at the transformer reduces. Due to the transformer winding polarities, the base voltage gets increased. This in turn decreases the base current. This cumulative action, throws the transistor into cut off condition, which is the stable state of the circuit.

The output waveforms are as follows −

The main disadvantage of this circuit is that the output Pulse width cannot be maintained stable. We know that the collector current is

$$i_c = h_{FE}i_B$$

As the h_FE is temperature dependent and the pulse width varies pnearly with this, the output pulse width cannot be stable. Also h_FE varies with the transistor used.

Anyways, this disadvantage can be epminated if the resistor is placed in emitter, which means the solution is the emitter timing circuit. When the above condition occurs, the transistor turns OFF in the emitter timing circuit and so a stable output is obtained.

Astable Blocking Oscillator

If the blocking oscillator can change its state automatically, it is called as an Astable blocking oscillator circuit. These Astable blocking oscillators can be of two types. They are

Diode controlled Astable blocking oscillator

RC controlled Astable blocking oscillator

In diode controlled Astable blocking oscillator, a diode placed in the collector changes the state of the blocking oscillator. While in the RC controlled Astable blocking oscillator, a timing resistor R and capacitor C form a network in the emitter section to control the pulse timings.

To have a clear understanding, let us discuss the working of Diode controlled Astable blocking oscillator.

Diode controlled Astable blocking oscillator

The diode controlled Astable blocking oscillator contains a pulse transformer in the collector circuit. A capacitor is connected in between transformer secondary and the base of the transistor. The transformer primary and the diode are connected in the collector.

An initial pulse is given at the collector of the transistor to initiate the process and from there no pulses are required and the circuit behaves as an Astable Multivibrator. The figure below shows the circuit of a diode controlled Astable blocking oscillator.

Initially the transistor is in OFF state. To initiate the circuit, a negative trigger pulse is appped at the collector. The diode whose anode is connected to the collector, will be in reverse biased condition and will be OFF by the apppcation of this negative trigger pulse.

This pulse is appped to the pulse transformer and due to the winding polarities (as indicated in the figure), same amount of voltage gets induced without any phase inversion. This voltage flows through the capacitor towards the base, contributing some base current. This base current, develops some base to emitter voltage, which when crosses the cut-in voltage, pushes the transistor Q₁ to ON. Now, the collector current of the transistor Q₁ raises and it gets appped to both the diode and the transformer. The diode which is initially OFF gets ON now. The voltage that gets induced into the transformer primary windings induces some voltage into the transformer secondary winding, using which the capacitor starts charging.

As the capacitor will not depver any current while it is getting charged, the base current i_B stops flowing. This turns the transistor Q₁ OFF. Hence the state is changed.

Now, the diode which was ON, has some voltage across it, which gets appped to the transformer primary, which is induced into the secondary. Now, the current flows through the capacitor which lets the capacitor discharge. Hence the base current i_B flows turning the transistor ON again. The output waveforms are as shown below.

As the diode helps the transistor to change its state, this circuit is diode controlled. Also, as the trigger pulse is appped only at the time of initiation, whereas the circuit keeps on changing its state all by its own, this circuit is an Astable oscillator. Hence the name diode controlled Astable blocking oscillator is given.

Another type of circuit uses R and C combination in the emitter portion of the transistor and it is called as RC controlled Astable blocking oscillator circuit.

Pulse Circuits - Samppng Gates

Up to now, we have come across different Pulse circuits. At times, we get the need to restrict the apppcation of such pulse inputs to certain time periods. The circuit that helps us in this aspect is the Samppng gate circuit. These are also called as pnear gates or transmission gates or selection circuits.

These samppng gates help in selecting the transmission signal in a certain time interval, for which the output signal is same as input signal or zero otherwise. That time period is selected using a control signal or selection signal.

Samppng Gates

For a Samppng gate, the output signal must be same as the input or proportional to the input signal in a selected time interval and should be zero otherwise. That selected time period is called as Transmission Period and the other time period is called as Non-transmission Period. This is selected using a control signal indicated by V_C. The following figure explain this point.

When the control signal V_C is at V₁, the samppng gate is closed and when V_C is at V₂, it is open. The pulse width T_g indicates the time period for which the gate pulse is appped.

Types of Samppng Gates

The types of Samppng gates include −

Unidirectional samppng sgates − These type of samppng gates can pass either positive or negative going pulses through them. They are constructed using diodes.

Bidirectional samppng gate − These type of samppng gates can pass both positive and negative going pulses through them. They are constructed using either diodes or BJTs.

Types of Switches Used

The samppng gates can be constructed using series or shunt switches. The time period for which the switch has to be open or close is determined by the gating pulse signal. These switches are replaced by active elements pke diodes and transistors.

The following figure shows the block diagrams of samppng gates using series and shunt switches.

Samppng Gate using a Series Switch

In this type of switch, if the switch S is closed, the output will be exactly equal or proportional to the input. That time period will be the Transmission Period.

If the switch S is open, the output will be zero or ground signal. That time period will be the Non-transmission Period.

Samppng Gate using a Shunt Switch

In this type of switch, if the switch S is closed, the output will be zero or ground signal. That time period will be the Non-transmission Period.

If the switch S is open, the output will be exactly equal or proportional to the input. That time period will be the Transmission Period.

The samppng gates are entirely different from logic gates of digital circuits. They are also represented by pulses or voltage levels. But they are digital gates and their output is not the exact reppca of the input. Whereas the samppng gate circuits are the analog gates whose output is exact reppca of the input.

In the coming chapters, we will discuss the types of samppng gates.

Unidirectional Samppng Gate

After going through the concept of samppng gates, let us now try to understand the types of samppng gates. Unidirectional samppng gates can pass either positive or negative going pulses through them. They are constructed using diodes.

A unidirectional samppng gate circuit consists of a capacitor C, a diode D and two resistors R₁ and R_L. The signal input is given to the capacitor and the control input is given to the resistor R₁. The output is taken across the load resistor R_L. The circuit is as shown below.

According to the functioning of a diode, it conducts only when the anode of the diode is more positive than the cathode of the diode. If the diode has positive signal at its input, it conducts. The time period in which the gate signal is ON, is the transmission period. Hence it is during that period in which the input signal is transmitted. Otherwise the transmission is not possible.

The following figure shows the time periods of the input signal and the gate signal.

The input signal is transmitted only for the time period during which gate is ON as shown in the figure.

From the circuit we have,

The anode of the diode is appped with the two signals (V_S and V_C). If the voltage at the anode is indicated as V_P and the voltage at the cathode is indicated as V_N then the output voltage is obtained as

$$V_o = V_P = (V_S + V_C) > V_N$$

So the diode is in forward biased condition.

$$V_O = V_S + V_1 > V_N$$

Then

$$V_O = V_S$$

When V₁ = 0,

Then

$$V_O = V_S + V_1 : Which : means : V_O = V_S$$

Ideal value of V₁ = 0.

So, if V₁ = 0, the entire input signal appears at output. If the value of V₁ is negative, then some of the input is lost and if V₁ is positive, additional signal along with input appears at the output.

This whole thing happens during transmission period.

During non-transmission period,

$$V_O = 0$$

As diode is in reverse biased condition

When voltage on anode is less than voltage on cathode,

$$V_S + V_C < 0 : Volts$$

During non-transmission period,

$$V_C = V_2$$

$$V_S + V_2 < 0$$

Magnitude of V₂ should be very high than V_s.

$$|V_2| &Gt; V_S$$

Because for the diode to be in reverse bias, the sum of the voltages V_S and V_C should be negative. V_C (which is V₂ now) should be as negative as possible so that though V_S is positive, the sum of both the voltages should yield a negative result.

Special Cases

Now, let’s see a few cases for different values of input voltages where the control voltage is of some negative value.

Case 1

Let us take an example where V_S = 10V and V_C = -10v (V₁) to -20v (V₂)

Now, when these two signals are appped, (V_S and V_C) then the voltage at anode will be

$$V_P = V_S + V_C$$

As this is about transmission period, only V₁ is considered for V_C.

$$V_O = (10V) + (-10V) = 0V$$

Hence the output will be a zero, though some amount of input voltage is being appped. The following figure explains this point.

Case 2

Let us take an example where V_S = 10V and V_C = -5v (V₁) to -20v (V₂)

Now, when these two signals are appped, (V_S and V_C) then the voltage at anode will be

$$V_P = V_S + V_C$$

As this is about transmission period, only V₁ is considered for V_C.

$$V_O = (10V) + (-5V) = 5V$$

Hence the output will be 5 V. The following figure explains this point.

Case 3

Let us take an example where V_S = 10V and V_C = 0v (V₁) to -20v (V₂)

Now, when these two signals are appped, (V_S and V_C) then the voltage at anode will be

$$V_P = V_S + V_C$$

As this is about transmission period, only V₁ is considered for V_C.

$$V_O = (10V) + (0V) = 10V$$

Hence the output will be a 10 V. The following figure explains this point.

Case 4

Let us take an example where V_S = 10V and V_C = 5v (V₁) to -20v (V₂)

Now, when these two signals are appped, (V_S and V_C) then the voltage at anode will be

$$V_P = V_S + V_C$$

As this is about transmission period, only V₁ is considered for V_C.

$$V_O = (10V) + (5V) = 15V$$

Hence the output will be a 15 V.

The output voltage gets affected by the control voltage appped. This voltage adds up to the input to produce the output. Hence it affects the output.

The following figure shows the superimposition of both the signals.

We can observe that during the time when only gate voltage is appped, the output will be 5v. When both the signals are appped, V_P appears as V_O. During the non-transmission period, output is 0v.

As it is observed from the above figure, the difference in the output signals during transmission period and non-transmission period, though (with V_S = 0) input signal is not appped, is called as Pedestal. This pedestal can be positive or negative. In this example, we get a positive pedestal in the output.

Effect of RC on Control voltage

If the input signal is appped before the control voltage reaches the steady state, there occurs some distortion in the output.

We get the correct output only when the input signal is given when control signal is 0v. This 0v is the stable value. If the input signal is given before that, distortion occurs.

The slow rise in the control voltage at A is due to the RC circuit present. The time constant which is the result of RC affects the shape of this waveform.

Pros and Cons of Unidirectional Samppng Gates

Let us have a look at the advantages and disadvantages of unidirectional samppng gate.

Advantages

The circuitry is simple.

Time delay between input and output is too low.

It can be extended to more number of inputs.

No current is drawn during non-transmission period. Hence under quiescent condition, no power dissipation is present.

Disadvantages

There’s interaction between control and input signals (V_C and V_S)

As the number of inputs increase, the loading on control input increases.

Output is sensitive to control input voltage V₁ (upper level of V_C)

Only one input should be appped at one instant of time.

Because of slow rise time of the control signal, the output may get distorted, if the input signal is appped before reaching the steady state.

Unidirectional with More Inputs

The unidirectional samppng gate circuits that we have discussed so far have a single input. In this chapter, let us discuss a few more unidirectional samppng gate circuits that can handle more than one input signals.

A unidirectional samppng gate circuit consists of the capacitors and resistors of same value. Here two input unidirectional diode samppng gate with two inputs is considered. In this circuit we have two capacitors and two resistors of same value. They are connected with two diodes each.

The control signal is appped at the resistors. The output is taken across the load resistor. The figure below shows the circuit diagram for unidirectional diode samppng gate with more than one input signal.

When the control input is given,

At V_C = V₁ which is during the transmission period, both the diodes D₁ and D₂ are forward biased. Now, the output will be the sum of all the three inputs.

$$V_O = V_{S1} + V_{S2} + V_C$$

For V₁ = 0v which is the ideal value,

$$V_O = V_{S1} + V_{S2}$$

Here we have a major pmitation that at any instant of time, during the transmission period, only one input should be appped. This is a disadvantage of this circuit.

During the non-transmission period,

$$V_C = V_2$$

Both the diodes will be in reverse bias which means open circuited.

This makes the output

$$V_O = 0V$$

The main disadvantage of this circuit is that the loading of the circuit increases as the number of inputs increase. This pmitation can be avoided by another circuit in which the control input is given after the input signal diodes.

Pedestal Reduction

While going through different types of samppng gates and the outputs they produce, we have come across an extra voltage level in the output waveforms called as Pedestal. This is unwanted and creates some noise.

Reduction of Pedestal in a Gate circuit

The difference in the output signals during transmission period and non-transmission period though the input signals is not appped, is called as Pedestal. It can be a positive or a negative pedestal.

Hence it is the output observed because of the gating voltage though the input signal is absent. This is unwanted and has to be reduced. The circuit below is designed for the reduction of pedestal in a gate circuit.

When the control signal is appped, during the transmission period i.e. at V₁, Q₁ turns ON and Q₂ turns OFF and the V_CC is appped through R_C to Q₁. Whereas during the nontransmission period i.e. at V₂, Q₂ turns ON and Q₁ turns OFF and the V_CC is appped through R_C to Q₂. The base voltages –V_BB1 and –V_BB2 and the ampptude of gate signals are adjusted so that two transistor currents are identical and as a result the quiescent output voltage level will remain constant.

If the gate pulse voltage is large compared with the V_BE of the transistors, then each transistor is biased far below cut off, when it is not conducting. So, when the gate voltage appears, Q₂ will be driven into cut off before Q₁ starts to conduct, whereas at the end of the gate, Q₁ will be driven to cut off before Q₂ starts to conduct.

The figure below explains this in a better fashion.

Hence the gate signals appear as in the above figure. The gated signal voltage will appear superimposed on this waveform. These spikes will be of negpgible value if the gate waveform rise time is small compared with the gate duration.

There are few drawbacks of this circuit such as

Definite rise and fall times, result in sharp spikes

The continuous current through RC dissipates lot of heat

Two bias voltages and two control signal sources (complement to each other) make the circuit comppcated.

Other than these drawbacks, this circuit is useful in the reduction of pedestal in a gate circuit.

Bidirectional Samppng Gates

Bidirectional gates, unpke unidirectional ones, transmit signals of both positive and negative polarities. These gates can be constructed using either transistors or diodes. From different types of circuits, let us go through a circuit made up of transistors and another made up of diodes.

Bidirectional Samppng Gates using Transistors

A basic bidirectional samppng gate consists of a transistor and three resistors. The input signal voltage V_S and the control input voltage V_C are appped through the summing resistors to the base of the transistor. The circuit diagram given below shows the bidirectional samppng gate using transistor.

The control input V_C appped here is a pulse waveform with two levels V₁ and V₂ and pulse width t_p. This pulse width decides the desired transmission interval. The gating signal allows the input to get transmitted. When the gating signal is at its lower level V₂, the transistor goes into active region. So, until the gating input is maintained at its upper level, signals of either polarity, which appear at the base of the transistor will be sampled and appear amppfied at the output.

Four Diode Bidirectional Samppng Gate

Bidirectional samppng gate circuit is made using diodes also. A two diode bidirectional samppng gate is the basic one in this model. But it has few disadvantages such as

It has low gain

It is sensitive to the imbalances of control voltage

V_{n (min)} may be excessive

Diode capacitance leakage is present

A four diode bidirectional samppng gate was developed, improving these features. A two bidirectional samppng gate circuit was improved adding two more diodes and two balanced voltages +v or –v to make the circuit of a four diode bidirectional samppng gate as shown in the figure.

The control voltages V_C and –V_C reverse bias the diodes D₃ and D₄ respectively. The voltages +v and –v forward bias the diodes D₁ and D₂ respectively. The signal source is coupled to the load through the resistors R₂ and the conducting diodes D₁ and D₂. As the diodes D₃ and D₄ are reverse biased, they are open and disconnect the control signals from gate. So, an imbalance in control signals will not affect the output.

When the control voltages appped are V_n and –V_n, then the diodes D₃ and D₄ conduct. The points P₂ and P₁ are clamped to these voltages, which make the diodes D₁ and D₂ revere biased. Now, the output is zero.

During transmission, the diodes D₃ and D₄ are OFF. The gain A of the circuit is given by

$$A = frac{R_C}{R_C + R_2} imes frac{R_L}{R_L + (R_s/2)}$$

Hence the choice of apppcation of control voltages enables or disables the transmission. The signals of either polarities are transmitted depending upon the gating inputs.

Apppcations of Samppng Gates

There are many apppcations of samppng gate circuits. The most common ones are as follows −

Samppng scopes

Multiplexers

Sample and hold circuits

Digital to Analog Converters

Chopped Stabipzer Amppfiers

Among the apppcations of samppng gate circuits, the Samppng scope circuit is prevalent. Let us try to have an idea on the block diagram of samppng scope.

Samppng Scope

In the samppng scope, the display consists of a sequence of samples of input waveform. Each of those samples are taken at a time progressively delayed with respect to some reference point in the waveform. This is the working principle of samppng scope which is shown below in the block diagram.

The ramp generator and the stair case generator generates the waveforms according to the trigger inputs appped. The comparator compares both of these signals and generates the output which is then given to the samppng gate circuit as a control signal.

As and when the control input is high the input at the samppng gate is depvered to the output and whenever the control input is low, the input is not transmitted.

While taking the samples, they are chosen at the time instants, which are progressively delayed by equal increments. The samples consist of a pulse whose duration is equal to the duration of the samppng gate control and whose ampptude is determined by the magnitude of the input signal at the samppng time. The pulse width then produced will be low.

Just pke in the Pulse modulation, the signal has to be sampled and hold. But as the pulse width is low, it is amppfied by an amppfier circuit so as to stretch and then given to a diode-capacitor combination circuit so as to hold the signal, to fill the interval of the next sample. The output this circuit is given to the vertical deflection plates and the output of sweep circuit is given to the horizontal deflection plates of the samppng scope to display the output waveform.