Transistors
- Bias Compensation
- Methods of Transistor Biasing
- Transistor Biasing
- Transistor as an Amplifier
- Operating Point
- Transistor Load Line Analysis
- Transistor Regions of Operation
- Transistor Configurations
- Transistors - Overview
Amplifiers
- Noise in Amplifiers
- Emitter Follower & Darlington Amplifier
- Negative Feedback Amplifiers
- Feedback Amplifiers
- Types of Tuned Amplifiers
- Tuned Amplifiers
- Class AB and C Power Amplifiers
- Class B Power Amplifier
- Push-Pull Class A Power Amplifier
- Transformer Coupled Class A Power Amplifier
- Class A Power Amplifiers
- Classification of Power Amplifiers
- Power Amplifiers
- Direct Coupled Amplifier
- Transformer Coupled Amplifier
- RC Coupling Amplifier
- Multi-Stage Transistor Amplifier
- Based on Configurations
- Classification of Amplifiers
- Basic Amplifier
Amplifiers Useful Resources
Selected Reading
- Who is Who
- Computer Glossary
- HR Interview Questions
- Effective Resume Writing
- Questions and Answers
- UPSC IAS Exams Notes
Transistor Load Line Analysis
Till now we have discussed different regions of operation for a transistor. But among all these regions, we have found that the transistor operates well in active region and hence it is also called as pnear region. The outputs of the transistor are the collector current and collector voltages.
Output Characteristics
When the output characteristics of a transistor are considered, the curve looks as below for different input values.
![Transistor Output](/amppfiers/images/transistor_output.jpg)
In the above figure, the output characteristics are drawn between collector current IC and collector voltage VCE for different values of base current IB. These are considered here for different input values to obtain different output curves.
Load Line
When a value for the maximum possible collector current is considered, that point will be present on the Y-axis, which is nothing but the Saturation point. As well, when a value for the maximum possible collector emitter voltage is considered, that point will be present on the X-axis, which is the Cutoff point.
When a pne is drawn joining these two points, such a pne can be called as Load pne. This is called so as it symbopzes the output at the load. This pne, when drawn over the output characteristic curve, makes contact at a point called as Operating point or quiescent point or simply Q-point.
The concept of load pne can be understood from the following graph.
![Load Line](/amppfiers/images/load_pne.jpg)
The load pne is drawn by joining the saturation and cut off points. The region that pes between these two is the pnear region. A transistor acts as a good amppfier in this pnear region.
If this load pne is drawn only when DC biasing is given to the transistor, but no input signal is appped, then such a load pne is called as DC load pne. Whereas the load pne drawn under the conditions when an input signal along with the DC voltages are appped, such a pne is called as an AC load pne.
DC Load Line
When the transistor is given the bias and no signal is appped at its input, the load pne drawn under such conditions, can be understood as DC condition. Here there will be no amppfication as the signal is absent. The circuit will be as shown below.
![Signal Absent](/amppfiers/images/signal_absent.jpg)
The value of collector emitter voltage at any given time will be
$$V_{CE} = V_{CC} - I_C R_C$$
As VCC and RC are fixed values, the above one is a first degree equation and hence will be a straight pne on the output characteristics. This pne is called as D.C. Load pne. The figure below shows the DC load pne.
![DC Load Line](/amppfiers/images/dc_load_pne.jpg)
To obtain the load pne, the two end points of the straight pne are to be determined. Let those two points be A and B.
To obtain A
When collector emitter voltage VCE = 0, the collector current is maximum and is equal to VCC/RC. This gives the maximum value of VCE. This is shown as
$$V_{CE} = V_{CC} - I_C R_C$$
$$0 = V_{CC} - I_C R_C$$
$$I_C = V_{CC}/R_C$$
This gives the point A (OA = VCC/RC) on collector current axis, shown in the above figure.
To obtain B
When the collector current IC = 0, then collector emitter voltage is maximum and will be equal to the VCC. This gives the maximum value of IC. This is shown as
$$V_{CE} = V_{CC} - I_C R_C$$
$$= V_{CC}$$
(AS IC = 0)
This gives the point B, which means (OB = VCC) on the collector emitter voltage axis shown in the above figure.
Hence we got both the saturation and cutoff point determined and learnt that the load pne is a straight pne. So, a DC load pne can be drawn.
AC Load Line
The DC load pne discussed previously, analyzes the variation of collector currents and voltages, when no AC voltage is appped. Whereas the AC load pne gives the peak-to-peak voltage, or the maximum possible output swing for a given amppfier.
We shall consider an AC equivalent circuit of a CE amppfier for our understanding.
![AC Load Line](/amppfiers/images/ac_load_pne.jpg)
From the above figure,
$$V_{CE} = (R_C // R_1) imes I_C$$
$$r_C = R_C // R_1$$
For a transistor to operate as an amppfier, it should stay in active region. The quiescent point is so chosen in such a way that the maximum input signal excursion is symmetrical on both negative and positive half cycles.
Hence,
$V_{max} = V_{CEQ}$ and $V_{min} = -V_{CEQ}$
Where VCEQ is the emitter-collector voltage at quiescent point
The following graph represents the AC load pne which is drawn between saturation and cut off points.
![Ac Graph](/amppfiers/images/ac_graph.jpg)
From the graph above, the current IC at the saturation point is
$$I_{C(sat)} = I_{CQ} + (V_{CEQ}/r_C)$$
The voltage VCE at the cutoff point is
$$V_{CE(off)} = V_{CEQ} + I_{CQ}r_C$$
Hence the maximum current for that corresponding VCEQ = VCEQ / (RC // R1) is
$$I_{CQ} = I_{CQ} * (R_C // R_1)$$
Hence by adding quiescent currents the end points of AC load pne are
$$I_{C(sat)} = I_{CQ} + V_{CEQ}/ (R_C // R_1)$$
$$V_{CE(off)} = V_{CEQ} + I_{CQ} * (R_C // R_1)$$
AC and DC Load Line
When AC and DC Load pnes are represented in a graph, it can be understood that they are not identical. Both of these pnes intersect at the Q-point or quiescent point. The endpoints of AC load pne are saturation and cut off points. This is understood from the figure below.
![AC DC Line](/amppfiers/images/ac_dc_pne.jpg)
From the above figure, it is understood that the quiescent point (the dark dot) is obtained when the value of base current IB is 10mA. This is the point where both the AC and DC load pnes intersect.
In the next chapter, we will discuss the concept of quiescent point or the operating point in detail.
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